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@ -85,12 +85,12 @@ x = 1; y *= 2;
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Ideally this program has 2 possible final states:
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Ideally this program has 2 possible final states:
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* `y = 3`: (thread 2 did the check before thread 1 completed) y = 6`: (thread 2
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* `y = 3`: (thread 2 did the check before thread 1 completed)
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* `did the check after thread 1 completed)
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* `y = 6`: (thread 2 did the check after thread 1 completed)
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However there's a third potential state that the hardware enables:
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However there's a third potential state that the hardware enables:
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* `y = 2`: (thread 2 saw `x = 2`, but not `y = 3`, and then overwrote `y = 3`)
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* `y = 2`: (thread 2 saw `x = 1`, but not `y = 3`, and then overwrote `y = 3`)
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It's worth noting that different kinds of CPU provide different guarantees. It
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It's worth noting that different kinds of CPU provide different guarantees. It
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is common to separate hardware into two categories: strongly-ordered and weakly-
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is common to separate hardware into two categories: strongly-ordered and weakly-
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